Mercurial > projects > dstep
annotate dstep/coreservices/carboncore/MachineExceptions.d @ 11:07194b026fa4
Added bindings to a couple of frameworks, new license + some other things
author | Jacob Carlborg <doob@me.com> |
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date | Sat, 01 Aug 2009 15:03:28 +0200 |
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11
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1 /** |
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2 * Copyright: Copyright (c) 2009 Jacob Carlborg. |
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3 * Authors: Jacob Carlborg |
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4 * Version: Initial created: Jul 21, 2009 |
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5 * License: $(LINK2 http://www.boost.org/LICENSE_1_0.txt, Boost Software License 1.0) |
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6 */ |
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7 module dstep.coreservices.carboncore.MachineExceptions; |
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8 |
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9 //import dstep.AvailabilityMacros; |
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10 import dstep.coreservices.carboncore.MacTypes; |
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11 import dstep.coreservices.carboncore.MixedMode; |
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12 import dstep.internal.Types; |
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13 import dstep.internal.Version; |
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14 //import dstep.xmmintrin; |
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15 |
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16 struct OpaqueAreaID; |
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17 |
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18 alias OpaqueAreaID* AreaID; |
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19 alias uint MemoryReferenceKind; |
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20 alias uint ExceptionKind; |
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21 alias MachineInformationIntel MachineInformation; |
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22 alias RegisterInformationIntel RegisterInformation; |
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23 alias FPUInformationIntel FPUInformation; |
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24 alias VectorInformationIntel VectorInformation; |
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25 alias ExceptionHandlerProcPtr ExceptionHandlerUPP; |
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26 alias ExceptionHandlerUPP ExceptionHandlerTPP; |
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27 alias ExceptionHandlerTPP ExceptionHandler; |
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28 alias ubyte[10] FPRegIntel; |
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29 |
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30 extern (C) |
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31 { |
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32 alias int function (ExceptionInformation*) ExceptionHandlerProcPtr; |
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33 } |
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34 |
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35 enum |
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36 { |
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37 kWriteReference = 0, |
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38 kReadReference = 1, |
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39 kFetchReference = 2, |
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40 writeReference = kWriteReference, |
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41 readReference = kReadReference, |
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42 fetchReference = kFetchReference |
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43 } |
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44 |
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45 enum |
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46 { |
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47 kUnknownException = 0, |
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48 kIllegalInstructionException = 1, |
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49 kTrapException = 2, |
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50 kAccessException = 3, |
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51 kUnmappedMemoryException = 4, |
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52 kExcludedMemoryException = 5, |
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53 kReadOnlyMemoryException = 6, |
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54 kUnresolvablePageFaultException = 7, |
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55 kPrivilegeViolationException = 8, |
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56 kTraceException = 9, |
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57 kInstructionBreakpointException = 10, |
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58 kDataBreakpointException = 11, |
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59 kIntegerException = 12, |
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60 kFloatingPointException = 13, |
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61 kStackOverflowException = 14, |
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62 kTaskTerminationException = 15, |
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63 kTaskCreationException = 16, |
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64 kDataAlignmentException = 17 |
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65 } |
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66 |
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67 union Vector128 |
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68 { |
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69 c_ulong[4] l; |
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70 ushort[8] s; |
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71 ubyte[16] c; |
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72 } |
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73 |
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74 union ExceptionInfo |
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75 { |
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76 MemoryExceptionInformation* memoryInfo; |
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77 } |
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78 |
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79 static if (X86 || X86_64) |
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80 { |
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81 union Vector128Intel |
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82 { |
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83 float s; |
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84 int si; |
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85 int sd; |
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86 ubyte[16] c; |
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87 } |
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88 } |
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89 |
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90 struct MachineInformationPowerPC |
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91 { |
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92 UnsignedWide CTR; |
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93 UnsignedWide LR; |
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94 UnsignedWide PC; |
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95 uint CRRegister; |
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96 uint XER; |
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97 uint MSR; |
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98 uint MQ; |
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99 uint ExceptKind; |
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100 uint DSISR; |
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101 UnsignedWide DAR; |
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102 UnsignedWide Reserved; |
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103 } |
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104 |
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105 |
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106 struct RegisterInformationPowerPC |
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107 { |
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108 UnsignedWide R0; |
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109 UnsignedWide R1; |
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110 UnsignedWide R2; |
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111 UnsignedWide R3; |
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112 UnsignedWide R4; |
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113 UnsignedWide R5; |
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114 UnsignedWide R6; |
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115 UnsignedWide R7; |
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116 UnsignedWide R8; |
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117 UnsignedWide R9; |
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118 UnsignedWide R10; |
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119 UnsignedWide R11; |
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120 UnsignedWide R12; |
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121 UnsignedWide R13; |
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122 UnsignedWide R14; |
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123 UnsignedWide R15; |
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124 UnsignedWide R16; |
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125 UnsignedWide R17; |
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126 UnsignedWide R18; |
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127 UnsignedWide R19; |
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128 UnsignedWide R20; |
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129 UnsignedWide R21; |
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130 UnsignedWide R22; |
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131 UnsignedWide R23; |
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132 UnsignedWide R24; |
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133 UnsignedWide R25; |
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134 UnsignedWide R26; |
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135 UnsignedWide R27; |
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136 UnsignedWide R28; |
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137 UnsignedWide R29; |
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138 UnsignedWide R30; |
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139 UnsignedWide R31; |
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140 } |
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141 |
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142 |
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143 struct FPUInformationPowerPC |
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144 { |
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145 UnsignedWide* Registers; |
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146 uint FPSCR; |
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147 uint Reserved; |
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148 } |
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149 |
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150 |
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151 struct VectorInformationPowerPC |
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152 { |
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153 Vector128* Registers; |
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154 Vector128 VSCR; |
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155 uint VRsave; |
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156 } |
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157 |
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158 |
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159 struct MemoryExceptionInformation |
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160 { |
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161 AreaID theArea; |
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162 LogicalAddress theAddress; |
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163 int theError; |
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164 uint theReference; |
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165 } |
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166 |
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167 |
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168 struct ExceptionInformationPowerPC |
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169 { |
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170 uint theKind; |
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171 MachineInformationPowerPC* machineState; |
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172 RegisterInformationPowerPC* registerImage; |
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173 FPUInformationPowerPC* FPUImage; |
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174 ExceptionInfo info; |
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175 VectorInformationPowerPC* vectorImage; |
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176 } |
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177 |
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178 |
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179 struct MachineInformationIntel |
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180 { |
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181 uint CS; |
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182 uint DS; |
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183 uint SS; |
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184 uint ES; |
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185 uint FS; |
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186 uint GS; |
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187 uint EFLAGS; |
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188 uint EIP; |
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189 uint ExceptTrap; |
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190 uint ExceptErr; |
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191 uint ExceptAddr; |
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192 } |
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193 |
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194 |
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195 struct RegisterInformationIntel |
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196 { |
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197 uint EAX; |
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198 uint EBX; |
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199 uint ECX; |
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200 uint EDX; |
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201 uint ESI; |
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202 uint EDI; |
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203 uint EBP; |
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204 uint ESP; |
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205 } |
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206 |
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207 |
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208 struct FPUInformationIntel |
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209 { |
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210 FPRegIntel* Registers; |
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211 ushort Control; |
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212 ushort Status; |
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213 ushort Tag; |
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214 ushort Opcode; |
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215 uint EIP; |
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216 uint DP; |
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217 uint DS; |
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218 } |
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219 |
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220 |
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221 struct VectorInformationIntel |
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222 { |
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223 Vector128Intel* Registers; |
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224 } |
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225 |
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226 |
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227 struct ExceptionInformation |
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228 { |
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229 uint theKind; |
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230 MachineInformation* machineState; |
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231 RegisterInformation* registerImage; |
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232 FPUInformation* FPUImage; |
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233 ExceptionInfo info; |
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234 VectorInformation* vectorImage; |
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235 } |
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236 |
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237 extern (C) |
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238 { |
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239 ExceptionHandlerUPP NewExceptionHandlerUPP (ExceptionHandlerProcPtr userRoutine); |
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240 void DisposeExceptionHandlerUPP (ExceptionHandlerUPP userUPP); |
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241 int InvokeExceptionHandlerUPP (ExceptionInformation* theException, ExceptionHandlerUPP userUPP); |
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242 ExceptionHandlerTPP InstallExceptionHandler (ExceptionHandlerTPP theHandler); |
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243 } |