view dstep/coreservices/carboncore/MachineExceptions.d @ 11:07194b026fa4

Added bindings to a couple of frameworks, new license + some other things
author Jacob Carlborg <doob@me.com>
date Sat, 01 Aug 2009 15:03:28 +0200
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/**
 * Copyright: Copyright (c) 2009 Jacob Carlborg.
 * Authors: Jacob Carlborg
 * Version: Initial created: Jul 21, 2009 
 * License: $(LINK2 http://www.boost.org/LICENSE_1_0.txt, Boost Software License 1.0)
 */
module dstep.coreservices.carboncore.MachineExceptions;

//import dstep.AvailabilityMacros;
import dstep.coreservices.carboncore.MacTypes;
import dstep.coreservices.carboncore.MixedMode;
import dstep.internal.Types;
import dstep.internal.Version;
//import dstep.xmmintrin;

struct OpaqueAreaID;

alias OpaqueAreaID* AreaID;
alias uint MemoryReferenceKind;
alias uint ExceptionKind;
alias MachineInformationIntel MachineInformation;
alias RegisterInformationIntel RegisterInformation;
alias FPUInformationIntel FPUInformation;
alias VectorInformationIntel VectorInformation;
alias ExceptionHandlerProcPtr ExceptionHandlerUPP;
alias ExceptionHandlerUPP ExceptionHandlerTPP;
alias ExceptionHandlerTPP ExceptionHandler;
alias ubyte[10] FPRegIntel;

extern (C)
{
	alias int function (ExceptionInformation*) ExceptionHandlerProcPtr;
}

enum
{
	kWriteReference = 0,
	kReadReference = 1,
	kFetchReference = 2,
	writeReference = kWriteReference,
	readReference = kReadReference,
	fetchReference = kFetchReference
}

enum
{
	kUnknownException = 0,
	kIllegalInstructionException = 1,
	kTrapException = 2,
	kAccessException = 3,
	kUnmappedMemoryException = 4,
	kExcludedMemoryException = 5,
	kReadOnlyMemoryException = 6,
	kUnresolvablePageFaultException = 7,
	kPrivilegeViolationException = 8,
	kTraceException = 9,
	kInstructionBreakpointException = 10,
	kDataBreakpointException = 11,
	kIntegerException = 12,
	kFloatingPointException = 13,
	kStackOverflowException = 14,
	kTaskTerminationException = 15,
	kTaskCreationException = 16,
	kDataAlignmentException = 17
}

union Vector128
{
	c_ulong[4] l;
	ushort[8] s;
	ubyte[16] c;
}

union ExceptionInfo
{
	MemoryExceptionInformation* memoryInfo;
}

static if (X86 || X86_64)
{
	union Vector128Intel
	{
		float s;
		int si;
		int sd;
		ubyte[16] c;
	}
}

struct MachineInformationPowerPC
{
	UnsignedWide CTR;
	UnsignedWide LR;
	UnsignedWide PC;
	uint CRRegister;
	uint XER;
	uint MSR;
	uint MQ;
	uint ExceptKind;
	uint DSISR;
	UnsignedWide DAR;
	UnsignedWide Reserved;
}


struct RegisterInformationPowerPC
{
	UnsignedWide R0;
	UnsignedWide R1;
	UnsignedWide R2;
	UnsignedWide R3;
	UnsignedWide R4;
	UnsignedWide R5;
	UnsignedWide R6;
	UnsignedWide R7;
	UnsignedWide R8;
	UnsignedWide R9;
	UnsignedWide R10;
	UnsignedWide R11;
	UnsignedWide R12;
	UnsignedWide R13;
	UnsignedWide R14;
	UnsignedWide R15;
	UnsignedWide R16;
	UnsignedWide R17;
	UnsignedWide R18;
	UnsignedWide R19;
	UnsignedWide R20;
	UnsignedWide R21;
	UnsignedWide R22;
	UnsignedWide R23;
	UnsignedWide R24;
	UnsignedWide R25;
	UnsignedWide R26;
	UnsignedWide R27;
	UnsignedWide R28;
	UnsignedWide R29;
	UnsignedWide R30;
	UnsignedWide R31;
}


struct FPUInformationPowerPC
{
	UnsignedWide* Registers;
	uint FPSCR;
	uint Reserved;
}


struct VectorInformationPowerPC
{
	Vector128* Registers;
	Vector128 VSCR;
	uint VRsave;
}


struct MemoryExceptionInformation
{
	AreaID theArea;
	LogicalAddress theAddress;
	int theError;
	uint theReference;
}


struct ExceptionInformationPowerPC
{
	uint theKind;
	MachineInformationPowerPC* machineState;
	RegisterInformationPowerPC* registerImage;
	FPUInformationPowerPC* FPUImage;
	ExceptionInfo info;
	VectorInformationPowerPC* vectorImage;
}


struct MachineInformationIntel
{
	uint CS;
	uint DS;
	uint SS;
	uint ES;
	uint FS;
	uint GS;
	uint EFLAGS;
	uint EIP;
	uint ExceptTrap;
	uint ExceptErr;
	uint ExceptAddr;
}


struct RegisterInformationIntel
{
	uint EAX;
	uint EBX;
	uint ECX;
	uint EDX;
	uint ESI;
	uint EDI;
	uint EBP;
	uint ESP;
}


struct FPUInformationIntel
{
	FPRegIntel* Registers;
	ushort Control;
	ushort Status;
	ushort Tag;
	ushort Opcode;
	uint EIP;
	uint DP;
	uint DS;
}


struct VectorInformationIntel
{
	Vector128Intel* Registers;
}


struct ExceptionInformation
{
	uint theKind;
	MachineInformation* machineState;
	RegisterInformation* registerImage;
	FPUInformation* FPUImage;
	ExceptionInfo info;
	VectorInformation* vectorImage;
}

extern (C)
{
	ExceptionHandlerUPP NewExceptionHandlerUPP (ExceptionHandlerProcPtr userRoutine);
	void DisposeExceptionHandlerUPP (ExceptionHandlerUPP userUPP);
	int InvokeExceptionHandlerUPP (ExceptionInformation* theException, ExceptionHandlerUPP userUPP);
	ExceptionHandlerTPP InstallExceptionHandler (ExceptionHandlerTPP theHandler);
}