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1 // $HeadURL$
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2 // $Date$
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3 // $Author$
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4
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5 // @author@ Thomas Kuehne <thomas-dloop@kuehne.cn>
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6
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7 module /*dstress.*/addon.cpuinfo;
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8
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9 version(D_InlineAsm){
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10 version(X86){
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11 const bool haveX86InlineAsm = true;
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12 version = haveX86InlineAsm;
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13 }else version(X86_64){
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14 const bool haveX86InlineAsm = true;
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15 version = haveX86InlineAsm;
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16 }else{
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17 pragma(msg, "DSTRESS{XFAIL}: no inline ASM support");
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18 const bool haveX86InlineAsm = false;
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19 }
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20 }else version(D_InlineAsm_X86){
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21 const bool haveX86InlineAsm = true;
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22 version = haveX86InlineAsm;
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23 }else version(D_InlineAsm_X86_X64){
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24 const bool haveX86InlineAsm = true;
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25 version = haveX86InlineAsm;
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26 }else{
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27 pragma(msg, "DSTRESS{XFAIL}: no inline ASM support");
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28 const bool haveX86InlineAsm = false;
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29 }
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30
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31 template have3DNow(){
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32 void have3DNow(){
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33 uint a = 0;
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34
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35 version(haveX86InlineAsm){
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36 asm{
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37 mov EAX, 0x8000_0001;
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38 db 0x53;
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39 cpuid;
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40 db 0x5B;
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41 mov a, EDX;
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42 }
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43 }else{
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44 pragma(msg, "DSTRESS{XFAIL}: no inline ASM support");
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45 }
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46
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47 if(!((a >> 30) & 1)){
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48 throw new Exception("DSTRESS{XFAIL}: no 3DNow! support present");
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49 }
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50 }
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51 }
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52
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53 template haveCMOV(){
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54 void haveCMOV(){
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55 uint a = 0;
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56
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57 version(haveX86InlineAsm){
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58 asm{
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59 mov EAX, 1;
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60 db 0x53;
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61 cpuid;
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62 db 0x5B;
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63 mov a, EDX;
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64 }
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65 }else{
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66 pragma(msg, "DSTRESS{XFAIL}: no inline ASM support");
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67 }
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68
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69 if(!((a >> 15) & 1)){
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70 throw new Exception("DSTRESS{XFAIL}: no CMOV support present");
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71 }
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72 }
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73 }
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74
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75 void haveCX8(){
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76 uint a = 0;
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77
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78 version(haveX86InlineAsm){
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79 asm{
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80 mov EAX, 1;
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81 db 0x53;
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82 cpuid;
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83 db 0x5B;
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84 mov a, EDX;
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85 }
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86 }
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87
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88 if(!((a >> 8) & 1)){
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89 throw new Exception("no X86 CX8 support present");
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90 }
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91 }
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92
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93 template haveFPU(){
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94 void haveFPU(){
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95 uint a = 0;
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96
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97 version(haveX86InlineAsm){
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98 asm{
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99 mov EAX, 1;
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100 db 0x53;
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101 cpuid;
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102 db 0x5B;
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103 mov a, EDX;
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104 }
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105 }else{
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106 pragma(msg, "DSTRESS{XFAIL}: no inline ASM support");
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107 }
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108
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109 if(!(a & 1)){
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110 throw new Exception("DSTRESS{XFAIL}: no X86 FPU present");
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111 }
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112 }
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113 }
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114
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115 template haveMMX(){
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116 void haveMMX(){
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117 uint a = 0;
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118
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119 version(haveX86InlineAsm){
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120 asm{
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121 mov EAX, 1;
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122 db 0x53;
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123 cpuid;
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124 db 0x5B;
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125 mov a, EDX;
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126 }
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127 }else{
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128 pragma(msg, "DSTRESS{XFAIL}: no inline ASM support");
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129 }
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130
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131 if(!((a >> 23) & 1)){
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132 throw new Exception("DSTRESS{XFAIL}: no MMX support present");
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133 }
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134 }
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135 }
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136
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137 template haveSSE(){
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138 void haveSSE(){
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139 uint a = 0;
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140
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141 version(haveX86InlineAsm){
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142 asm{
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143 mov EAX, 1;
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144 db 0x53;
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145 cpuid;
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146 db 0x5B;
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147 mov a, EDX;
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148 }
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149 }else{
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150 pragma(msg, "DSTRESS{XFAIL}: no inline ASM support");
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151 }
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152
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153 if(!((a >> 25) & 1)){
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154 throw new Exception("DSTRESS{XFAIL}: no SSE support present");
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155 }
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156 }
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157 }
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158
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159 template haveSSE2(){
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160 void haveSSE2(){
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161 uint a = 0;
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162
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163 version(haveX86InlineAsm){
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164 asm{
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165 mov EAX, 1;
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166 db 0x53;
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167 cpuid;
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168 db 0x5B;
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169 mov a, EDX;
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170 }
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171 }else{
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172 pragma(msg, "DSTRESS{XFAIL}: no inline ASM support");
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173 }
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174
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175 if(!((a >> 26) & 1)){
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176 throw new Exception("DSTRESS{XFAIL}: no SSE2 support present");
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177 }
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178 }
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179 }
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180
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181 template haveSSE3(){
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182 void haveSSE3(){
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183 uint a = 1;
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184 uint b = 0;
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185
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186 version(haveX86InlineAsm){
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187 asm{
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188 mov EAX, a;
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189 db 0x53;
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190 cpuid;
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191 db 0x5B;
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192 mov b, ECX;
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193 }
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194 }else{
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195 pragma(msg, "DSTRESS{XFAIL}: no inline ASM support");
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196 }
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197
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198 if(!(a & 1)){
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199 throw new Exception("DSTRESS{XFAIL}: no SSE3 support present");
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200 }
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201 }
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202 }
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203
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204 template aligned_new(T){
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205 T[] aligned_new(size_t len, size_t alignment){
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206 ubyte* ptr = (new ubyte[len * T.sizeof + alignment]).ptr;
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207
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208 alignment *= 8;
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209
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210 while((cast(size_t)ptr) % alignment){
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211 ptr++;
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212 }
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213
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214 T[]data = (cast(T*) ptr)[0 .. len];
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215 data[] = T.init;
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216
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217 return data;
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218 }
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219 }
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