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1017
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1 // $HeadURL$
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2 // $Date$
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3 // $Author$
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4
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5 module dstress.run.a.asm_pand_01_A;
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6
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7 version(D_InlineAsm_X86){
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8 version = runTest;
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9 }else version(D_InlineAsm_X86_64){
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10 version = runTest;
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11 }
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12
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13 version(runTest){
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14 import addon.cpuinfo;
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1044
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15
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1017
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16 int main(){
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17 haveSSE2!()();
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18
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1285
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19 ushort[] A = [
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1017
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20 0b01101100_01101110, 0b01101001_01101101, 0b01100011_01101011, 0b11100111_01100111,
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21 0b11000110_11100110, 0b10001101_10011011, 0b00011011_10011011, 0b01100110_00000000
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22 ];
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1285
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23 ushort* a = A.ptr;
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24
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25 ushort[] B = [
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1017
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26 0b10000000_11000000, 0b01000000_01100000, 0b00100000_00110000, 0b00010000_00011000,
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27 0b00001000_00001100, 0b00000100_00000110, 0b00000010_00000011, 0b11111111_10101010
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28 ];
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1285
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29 ushort* b = B.ptr;
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30
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31 ushort* c = (new ushort[8]).ptr;
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1044
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32
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1182
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33 static if(size_t.sizeof == 4){
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34 asm{
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35 mov EAX, a;
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36 movdqu XMM0, [EAX];
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37 mov EAX, b;
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38 movdqu XMM1, [EAX];
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39 pand XMM0, XMM1;
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40 mov EAX, c;
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41 movdqu [EAX], XMM0;
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42 }
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43 }else static if(size_t.sizeof == 8){
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44 asm{
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45 mov RAX, a;
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46 movdqu XMM0, [RAX];
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47 mov RAX, b;
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48 movdqu XMM1, [RAX];
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49 pand XMM0, XMM1;
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50 mov RAX, c;
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51 movdqu [RAX], XMM0;
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52 }
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53 }else{
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54 static assert(0, "unhandled pointer size");
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1017
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55 }
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56
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1164
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57 if(c[0] != (a[0] & b[0])){
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1017
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58 assert(0);
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59 }
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1164
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60 if(c[1] != (a[1] & b[1])){
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1017
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61 assert(0);
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62 }
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1164
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63 if(c[2] != (a[2] & b[2])){
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64 assert(0);
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65 }
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66 if(c[3] != (a[3] & b[3])){
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1017
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67 assert(0);
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68 }
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1164
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69 if(c[4] != (a[4] & b[4])){
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1017
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70 assert(0);
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71 }
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1164
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72 if(c[5] != (a[5] & b[5])){
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1017
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73 assert(0);
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74 }
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1164
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75 if(c[6] != (a[6] & b[6])){
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1017
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76 assert(0);
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77 }
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1164
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78 if(c[7] != (a[7] & b[7])){
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1017
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79 assert(0);
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80 }
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81 return 0;
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82 }
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83 }else{
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84 pragma(msg, "DSTRESS{XFAIL}: no inline ASM support");
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85 static assert(0);
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86 }
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