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1017
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1 // $HeadURL$
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2 // $Date$
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3 // $Author$
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4
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5 module dstress.run.a.asm_paddb_01_A;
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6
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7 version(D_InlineAsm_X86){
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8 version = runTest;
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9 }else version(D_InlineAsm_X86_64){
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10 version = runTest;
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11 }
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12
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13 version(runTest){
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14 import addon.cpuinfo;
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1044
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15
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1017
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16 int main(){
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17 haveSSE2!()();
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18
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1285
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19 byte* a = (new byte[16]).ptr;
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1085
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20 a[0] = 1;
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21 a[1] = 2;
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22 a[2] = 3;
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23 a[3] = 4;
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24 a[4] = 5;
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25 a[5] = 6;
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26 a[6] = 7;
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27 a[7] = 8;
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28 a[8] = 9;
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29 a[9] = 10;
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30 a[10] = 11;
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31 a[11] = 12;
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32 a[12] = 13;
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1285
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33 a[13] = 14;
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1085
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34 a[14] = 15;
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35 a[15] = 16;
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36
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1285
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37 byte* b = (new byte[16]).ptr;
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1085
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38 b[0] = -8;
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39 b[1] = -7;
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40 b[2] = -6;
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41 b[3] = -5;
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42 b[4] = -4;
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43 b[5] = -3;
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44 b[6] = -2;
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45 b[7] = -1;
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46 b[8] = 0;
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47 b[9] = 1;
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48 b[10] = 2;
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49 b[11] = 3;
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50 b[12] = 4;
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51 b[13] = 5;
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52 b[14] = 6;
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53 b[15] = 7;
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1091
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54
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1285
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55 byte* c = (new byte[16]).ptr;
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1044
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56
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1285
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57 static if(size_t.sizeof == 4){
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58 asm{
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59 mov EAX, a;
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60 movdqu XMM0, [EAX];
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61 mov EAX, b;
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62 movdqu XMM1, [EAX];
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63 paddb XMM0, XMM1;
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64 mov EAX, c;
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65 movdqu [EAX], XMM0;
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66 }
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67 }else static if(size_t.sizeof == 8){
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68 asm{
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69 mov RAX, a;
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70 movdqu XMM0, [RAX];
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71 mov RAX, b;
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72 movdqu XMM1, [RAX];
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73 paddb XMM0, XMM1;
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74 mov RAX, c;
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75 movdqu [RAX], XMM0;
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76 }
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77 }else{
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78 static assert(0, "unhandled pointer size");
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1017
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79 }
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80
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81 if(c[0] != -7){
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82 assert(0);
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83 }
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84 if(c[1] != -5){
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85 assert(0);
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86 }
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87 if(c[2] != -3){
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88 assert(0);
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89 }
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90 if(c[3] != -1){
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91 assert(0);
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92 }
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93 if(c[4] != 1){
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94 assert(0);
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95 }
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96 if(c[5] != 3){
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97 assert(0);
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98 }
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99 if(c[6] != 5){
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100 assert(0);
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101 }
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102 if(c[7] != 7){
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103 assert(0);
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104 }
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105 if(c[8] != 9){
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106 assert(0);
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107 }
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108 if(c[9] != 11){
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109 assert(0);
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110 }
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111 if(c[10] != 13){
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112 assert(0);
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113 }
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114 if(c[11] != 15){
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115 assert(0);
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116 }
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117 if(c[12] != 17){
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118 assert(0);
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119 }
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120 if(c[13] != 19){
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121 assert(0);
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122 }
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123 if(c[14] != 21){
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124 assert(0);
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125 }
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126 if(c[15] != 23){
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127 assert(0);
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128 }
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129 return 0;
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130 }
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131 }else{
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132 pragma(msg, "DSTRESS{XFAIL}: no inline ASM support");
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133 static assert(0);
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134 }
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