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comparison gen/asm-x86-32.h @ 1092:e6fadb6e6bdd

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Fix for x32 fmul/div/add/sub with no operands.
author Kelly Wilson <wilsonk cpsc.ucalgary.ca>
date Tue, 10 Mar 2009 20:40:22 -0400
parents b1d75bf46ffa
children fa20521cbb13
comparison
equal deleted inserted replaced
1091:20d96c148b39 1092:e6fadb6e6bdd
216 Op_FfdR_P, 216 Op_FfdR_P,
217 Op_FfdRR_P, 217 Op_FfdRR_P,
218 Op_Fd_P, 218 Op_Fd_P,
219 Op_FdST, 219 Op_FdST,
220 Op_FMath, 220 Op_FMath,
221 Op_FMath0,
222 Op_FMath2,
221 Op_FdSTiSTi, 223 Op_FdSTiSTi,
224 Op_FdST0ST1,
222 Op_FPMath, 225 Op_FPMath,
223 Op_FCmp, 226 Op_FCmp,
224 Op_FCmp1, 227 Op_FCmp1,
225 Op_FCmpP, 228 Op_FCmpP,
226 Op_FCmpP1, 229 Op_FCmpP1,
457 /* Op_Ffd_P */ { D|mfp, 0, 0, FP_Types, Clb_ST, Next_Form, Op_FfdR_P }, // pop, fld so also 80 bit, " 460 /* Op_Ffd_P */ { D|mfp, 0, 0, FP_Types, Clb_ST, Next_Form, Op_FfdR_P }, // pop, fld so also 80 bit, "
458 /* Op_FfdR_P */ { D|rfp, 0, 0, 0, Clb_ST, Next_Form, Op_FfdRR_P }, 461 /* Op_FfdR_P */ { D|rfp, 0, 0, 0, Clb_ST, Next_Form, Op_FfdRR_P },
459 /* Op_FfdRR_P */ { D|mfp|rfp,rfp,0, 0, Clb_ST }, 462 /* Op_FfdRR_P */ { D|mfp|rfp,rfp,0, 0, Clb_ST },
460 /* Op_Fd_P */ { D|mem, 0, 0, 0, Clb_ST }, // " 463 /* Op_Fd_P */ { D|mem, 0, 0, 0, Clb_ST }, // "
461 /* Op_FdST */ { D|rfp, 0, 0 }, 464 /* Op_FdST */ { D|rfp, 0, 0 },
462 /* Op_FMath */ { mfp, 0, 0, FP_Types, Clb_ST, Next_Form, Op_FdSTiSTi }, // and only single or double prec 465 /* Op_FMath */ { mfp, 0, 0, FP_Types, Clb_ST, Next_Form, Op_FMath0 }, // and only single or double prec
466 /* Op_FMath0 */ { 0, 0, 0, 0, Clb_ST, Next_Form, Op_FMath2 },
467 /* Op_FMath2 */ { D|rfp, rfp, 0, 0, Clb_ST, Next_Form, Op_FdST0ST1 },
463 /* Op_FdSTiSTi */ { D|rfp, rfp, 0, }, 468 /* Op_FdSTiSTi */ { D|rfp, rfp, 0, },
469 /* Op_FdST0ST1 */ { 0, 0, 0, },
464 /* Op_FPMath */ { D|rfp, rfp, 0, 0, Clb_ST, Next_Form, Op_F0_P }, // pops 470 /* Op_FPMath */ { D|rfp, rfp, 0, 0, Clb_ST, Next_Form, Op_F0_P }, // pops
465 /* Op_FCmp */ { mfp, 0, 0, FP_Types, 0, Next_Form, Op_FCmp1 }, // DMD defaults to float ptr 471 /* Op_FCmp */ { mfp, 0, 0, FP_Types, 0, Next_Form, Op_FCmp1 }, // DMD defaults to float ptr
466 /* Op_FCmp1 */ { rfp, 0, 0, 0, 0, Next_Form, Op_0 }, 472 /* Op_FCmp1 */ { rfp, 0, 0, 0, 0, Next_Form, Op_0 },
467 /* Op_FCmpP */ { mfp, 0, 0, FP_Types, 0, Next_Form, Op_FCmpP1 }, // pops 473 /* Op_FCmpP */ { mfp, 0, 0, FP_Types, 0, Next_Form, Op_FCmpP1 }, // pops
468 /* Op_FCmpP1 */ { rfp, 0, 0, 0, 0, Next_Form, Op_F0_P }, // pops 474 /* Op_FCmpP1 */ { rfp, 0, 0, 0, 0, Next_Form, Op_F0_P }, // pops
1359 unsigned operand_i = 0; 1365 unsigned operand_i = 0;
1360 1366
1361 opInfo = & asmOpInfo[op]; 1367 opInfo = & asmOpInfo[op];
1362 memset ( operands, 0, sizeof ( operands ) ); 1368 memset ( operands, 0, sizeof ( operands ) );
1363 1369
1370 if ( token->value == TOKeof && (op == Op_FMath0 ))
1371 {
1372 for (operand_i = 0; operand_i < 0; operand_i++)
1373 {
1374 operand = & operands[operand_i];
1375 operand->reg = operand->baseReg = operand->indexReg =
1376 operand->segmentPrefix = Reg_Invalid;
1377 operand->cls = Opr_Reg;
1378 if (operand_i == 0)
1379 {
1380 operand->reg = Reg_ST;
1381 }
1382 else
1383 {
1384 operand->reg = Reg_ST1;
1385 }
1386 operand->hasNumber = 0;
1387 operand->constDisplacement = 0;
1388 parseOperand();
1389
1390 if ( matchOperands ( operand_i ) )
1391 {
1392 AsmCode * asmcode = new AsmCode ( N_Regs );
1393
1394 if ( formatInstruction ( operand_i, asmcode ) )
1395 stmt->asmcode = ( code * ) asmcode;
1396 }
1397
1398 }
1399 return;
1400 }
1401
1364 while ( token->value != TOKeof ) 1402 while ( token->value != TOKeof )
1365 { 1403 {
1366 if ( operand_i < Max_Operands ) 1404 if ( operand_i < Max_Operands )
1367 { 1405 {
1368 operand = & operands[operand_i]; 1406 operand = & operands[operand_i];
1781 else 1819 else
1782 { 1820 {
1783 stmt->error ( "invalid operands" ); 1821 stmt->error ( "invalid operands" );
1784 return false; 1822 return false;
1785 } 1823 }
1824 }
1825 else if ( op == Op_FMath0 || op == Op_FdST0ST1 )
1826 {
1827 operands[0].cls = Opr_Reg;
1828 operands[0].reg = Reg_ST;
1829 operands[1].cls = Opr_Reg;
1830 operands[1].reg = Reg_ST1;
1831 nOperands = 2;
1786 } 1832 }
1787 1833
1788 switch ( op ) 1834 switch ( op )
1789 { 1835 {
1790 case Op_SizedStack: 1836 case Op_SizedStack:
2809 case TOKint16: 2855 case TOKint16:
2810 case TOKint32: 2856 case TOKint32:
2811 //This if for the 'short' in "jle short Label;" 2857 //This if for the 'short' in "jle short Label;"
2812 return Handled; 2858 return Handled;
2813 default: 2859 default:
2860 if ( op == Op_FMath0 || op == Op_FdST0ST1 || op == Op_FMath )
2861 return Handled;
2814 invalidExpression(); 2862 invalidExpression();
2815 return Handled; 2863 return Handled;
2816 } 2864 }
2817 return e; 2865 return e;
2818 } 2866 }