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comparison gen/asm-x86-32.h @ 1056:cc723604da95

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Fixed two operand form of X86 fstp instruction. (throw away second operand!)
author Tomas Lindquist Olsen <tomas.l.olsen gmail.com>
date Sun, 08 Mar 2009 02:36:09 +0100
parents eb310635d80e
children ee310a79e9a1
comparison
equal deleted inserted replaced
1054:a3d7288c4473 1056:cc723604da95
211 Op_Fid_P, 211 Op_Fid_P,
212 Op_Ffd, 212 Op_Ffd,
213 Op_FfdR, 213 Op_FfdR,
214 Op_Ffd_P, 214 Op_Ffd_P,
215 Op_FfdR_P, 215 Op_FfdR_P,
216 Op_FfdRR_P,
216 Op_Fd_P, 217 Op_Fd_P,
217 Op_FdST, 218 Op_FdST,
218 Op_FMath, 219 Op_FMath,
219 Op_FdSTiSTi, 220 Op_FdSTiSTi,
220 Op_FPMath, 221 Op_FPMath,
449 /* Op_Fis_P */ { mem, 0, 0, FPInt_Types, Clb_ST }, // push and pop, fild so also 64 bit 450 /* Op_Fis_P */ { mem, 0, 0, FPInt_Types, Clb_ST }, // push and pop, fild so also 64 bit
450 /* Op_Fid */ { D|mem, 0, 0, FPInt_Types }, // only 16bit and 32bit, DMD defaults to 16bit 451 /* Op_Fid */ { D|mem, 0, 0, FPInt_Types }, // only 16bit and 32bit, DMD defaults to 16bit
451 /* Op_Fid_P */ { D|mem, 0, 0, FPInt_Types, Clb_ST }, // push and pop, fild so also 64 bit 452 /* Op_Fid_P */ { D|mem, 0, 0, FPInt_Types, Clb_ST }, // push and pop, fild so also 64 bit
452 /* Op_Ffd */ { D|mfp, 0, 0, FP_Types, 0, Next_Form, Op_FfdR }, // only 16bit and 32bit, DMD defaults to 16bit, reg form doesn't need type 453 /* Op_Ffd */ { D|mfp, 0, 0, FP_Types, 0, Next_Form, Op_FfdR }, // only 16bit and 32bit, DMD defaults to 16bit, reg form doesn't need type
453 /* Op_FfdR */ { D|rfp, 0, 0 }, 454 /* Op_FfdR */ { D|rfp, 0, 0 },
454 /* Op_Ffd_P */ { D|mfp, 0, 0, FP_Types, Clb_ST, Next_Form, Op_FfdR_P, }, // pop, fld so also 80 bit, " 455 /* Op_Ffd_P */ { D|mfp, 0, 0, FP_Types, Clb_ST, Next_Form, Op_FfdR_P }, // pop, fld so also 80 bit, "
455 /* Op_FfdR_P */ { D|rfp, 0, 0, 0, Clb_ST }, 456 /* Op_FfdR_P */ { D|rfp, 0, 0, 0, Clb_ST, Next_Form, Op_FfdRR_P },
457 /* Op_FfdRR_P */ { D|mfp|rfp,rfp,0, 0, Clb_ST },
456 /* Op_Fd_P */ { D|mem, 0, 0, 0, Clb_ST }, // " 458 /* Op_Fd_P */ { D|mem, 0, 0, 0, Clb_ST }, // "
457 /* Op_FdST */ { D|rfp, 0, 0 }, 459 /* Op_FdST */ { D|rfp, 0, 0 },
458 /* Op_FMath */ { mfp, 0, 0, FP_Types, Clb_ST, Next_Form, Op_FdSTiSTi }, // and only single or double prec 460 /* Op_FMath */ { mfp, 0, 0, FP_Types, Clb_ST, Next_Form, Op_FdSTiSTi }, // and only single or double prec
459 /* Op_FdSTiSTi */ { D|rfp, rfp, 0, }, 461 /* Op_FdSTiSTi */ { D|rfp, rfp, 0, },
460 /* Op_FPMath */ { D|rfp, rfp, 0, 0, Clb_ST, Next_Form, Op_F0_P }, // pops 462 /* Op_FPMath */ { D|rfp, rfp, 0, 0, Clb_ST, Next_Form, Op_F0_P }, // pops
1745 else if ( op == Op_Branch ) 1747 else if ( op == Op_Branch )
1746 { 1748 {
1747 if ( operands[0].dataSize == Far_Ptr ) // %% type=Far_Ptr not set by Seg:Ofss OTOH, we don't support that.. 1749 if ( operands[0].dataSize == Far_Ptr ) // %% type=Far_Ptr not set by Seg:Ofss OTOH, we don't support that..
1748 insnTemplate->writebyte ( 'l' ); 1750 insnTemplate->writebyte ( 'l' );
1749 } 1751 }
1750 else if ( op == Op_fxch ) 1752 else if ( op == Op_fxch || op == Op_FfdRR_P)
1751 { 1753 {
1752 // gas won't accept the two-operand form 1754 // gas won't accept the two-operand form
1753 if ( operands[1].cls == Opr_Reg && operands[1].reg == Reg_ST ) 1755 if ( operands[1].cls == Opr_Reg && operands[1].reg == Reg_ST )
1754 { 1756 {
1755 nOperands = 1; 1757 nOperands = 1;