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comparison gen/asm-x86-32.h @ 1087:b1d75bf46ffa

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fix fistp properly for x32
author Kelly Wilson <wilsonk cpsc.ucalgary.ca>
date Tue, 10 Mar 2009 13:59:50 -0400
parents 56e56b3b9bb8
children e6fadb6e6bdd
comparison
equal deleted inserted replaced
1086:56e364ba346c 1087:b1d75bf46ffa
207 Op_Fis, 207 Op_Fis,
208 Op_Fis_ST, 208 Op_Fis_ST,
209 Op_Fis_P, 209 Op_Fis_P,
210 Op_Fid, 210 Op_Fid,
211 Op_Fid_P, 211 Op_Fid_P,
212 Op_FidR_P,
212 Op_Ffd, 213 Op_Ffd,
213 Op_FfdR, 214 Op_FfdR,
214 Op_Ffd_P, 215 Op_Ffd_P,
215 Op_FfdR_P, 216 Op_FfdR_P,
216 Op_FfdRR_P, 217 Op_FfdRR_P,
447 /* Op_Fs_P */ { mem, 0, 0, 0, Clb_ST }, // " 448 /* Op_Fs_P */ { mem, 0, 0, 0, Clb_ST }, // "
448 /* Op_Fis */ { mem, 0, 0, FPInt_Types }, // only 16bit and 32bit, DMD defaults to 16bit 449 /* Op_Fis */ { mem, 0, 0, FPInt_Types }, // only 16bit and 32bit, DMD defaults to 16bit
449 /* Op_Fis_ST */ { mem, 0, 0, FPInt_Types, Clb_ST }, // " 450 /* Op_Fis_ST */ { mem, 0, 0, FPInt_Types, Clb_ST }, // "
450 /* Op_Fis_P */ { mem, 0, 0, FPInt_Types, Clb_ST }, // push and pop, fild so also 64 bit 451 /* Op_Fis_P */ { mem, 0, 0, FPInt_Types, Clb_ST }, // push and pop, fild so also 64 bit
451 /* Op_Fid */ { D|mem, 0, 0, FPInt_Types }, // only 16bit and 32bit, DMD defaults to 16bit 452 /* Op_Fid */ { D|mem, 0, 0, FPInt_Types }, // only 16bit and 32bit, DMD defaults to 16bit
452 /* Op_Fid_P */ { D|mem, 0, 0, FPInt_Types, Clb_ST, Op_FfdRR_P }, // push and pop, fild so also 64 bit 453 /* Op_Fid_P */ { D|mem, 0, 0, FPInt_Types, Clb_ST, Next_Form, Op_FidR_P }, // push and pop, fild so also 64 bit
454 /* Op_FidR_P */ { D|mem,rfp, 0, 0, FPInt_Types, Clb_ST }, // push and pop, fild so also 64 bit
453 /* Op_Ffd */ { D|mfp, 0, 0, FP_Types, 0, Next_Form, Op_FfdR }, // only 16bit and 32bit, DMD defaults to 16bit, reg form doesn't need type 455 /* Op_Ffd */ { D|mfp, 0, 0, FP_Types, 0, Next_Form, Op_FfdR }, // only 16bit and 32bit, DMD defaults to 16bit, reg form doesn't need type
454 /* Op_FfdR */ { D|rfp, 0, 0 }, 456 /* Op_FfdR */ { D|rfp, 0, 0 },
455 /* Op_Ffd_P */ { D|mfp, 0, 0, FP_Types, Clb_ST, Next_Form, Op_FfdR_P }, // pop, fld so also 80 bit, " 457 /* Op_Ffd_P */ { D|mfp, 0, 0, FP_Types, Clb_ST, Next_Form, Op_FfdR_P }, // pop, fld so also 80 bit, "
456 /* Op_FfdR_P */ { D|rfp, 0, 0, 0, Clb_ST, Next_Form, Op_FfdRR_P }, 458 /* Op_FfdR_P */ { D|rfp, 0, 0, 0, Clb_ST, Next_Form, Op_FfdRR_P },
457 /* Op_FfdRR_P */ { D|mfp|rfp,rfp,0, 0, Clb_ST }, 459 /* Op_FfdRR_P */ { D|mfp|rfp,rfp,0, 0, Clb_ST },
1755 else if ( op == Op_Branch ) 1757 else if ( op == Op_Branch )
1756 { 1758 {
1757 if ( operands[0].dataSize == Far_Ptr ) // %% type=Far_Ptr not set by Seg:Ofss OTOH, we don't support that.. 1759 if ( operands[0].dataSize == Far_Ptr ) // %% type=Far_Ptr not set by Seg:Ofss OTOH, we don't support that..
1758 insnTemplate->writebyte ( 'l' ); 1760 insnTemplate->writebyte ( 'l' );
1759 } 1761 }
1760 else if ( op == Op_fxch || op == Op_FfdRR_P) 1762 else if ( op == Op_fxch || op == Op_FfdRR_P || op == Op_FidR_P )
1761 { 1763 {
1764 if ( operands[0].cls == Opr_Mem && op == Op_FidR_P )
1765 {
1766 nOperands = 1;
1767 }
1762 // gas won't accept the two-operand form 1768 // gas won't accept the two-operand form
1763 if ( operands[1].cls == Opr_Reg && operands[1].reg == Reg_ST ) 1769 else if ( operands[1].cls == Opr_Reg && operands[1].reg == Reg_ST )
1764 { 1770 {
1765 nOperands = 1; 1771 nOperands = 1;
1772 }
1773 else if ( operands[1].cls == Opr_Mem && operands[1].reg == Reg_ST || operands[0].cls == Opr_Mem )
1774 {
1775 nOperands = 1;
1776 }
1777 else if ( operands[0].cls == Opr_Reg && (operands[0].reg == Reg_ST || operands[0].reg == Reg_ST1 ))
1778 {
1779 //fix previous update to allow single operand form of fstp
1766 } 1780 }
1767 else 1781 else
1768 { 1782 {
1769 stmt->error ( "invalid operands" ); 1783 stmt->error ( "invalid operands" );
1770 return false; 1784 return false;