annotate run/a/asm_rcl_02_A.d @ 1630:d0efa3ae5522 default tip

run/mini/naked_asm5: New x86_64 ABI passes the arguments in reverse order.
author David Nadlinger <code@klickverbot.at>
date Sat, 23 Apr 2011 22:57:32 +0200
parents 03c97933de98
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
1040
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
1 // $HeadURL$
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
2 // $Date$
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
3 // $Author$
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
4
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
5 module dstress.run.a.asm_rcl_02_A;
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
6
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
7 version(D_InlineAsm_X86){
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
8 version = runTest;
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
9 }else version(D_InlineAsm_X86_64){
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
10 version = runTest;
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
11 }
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
12
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
13 version(runTest){
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
14 int main(){
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
15 uint a = 0b1111_1100__0000_0000__0111_1111__1111_1111;
1044
03c97933de98 inline ASM review
thomask
parents: 1040
diff changeset
16
1040
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
17 asm{
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
18 clc;
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
19 mov EAX, a;
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
20 rcl AL, 1;
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
21 mov a, EAX;
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
22 }
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
23
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
24 if(a != 0b1111_1100__0000_0000__0111_1111__1111_1110){
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
25 assert(0);
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
26 }
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
27
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
28 asm{
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
29 stc;
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
30 mov EAX, a;
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
31 rcl AL, 1;
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
32 mov a, EAX;
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
33 }
1044
03c97933de98 inline ASM review
thomask
parents: 1040
diff changeset
34
1040
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
35 if(a != 0b1111_1100__0000_0000__0111_1111__1111_1101){
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
36 assert(0);
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
37 }
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
38
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
39 return 0;
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
40 }
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
41 }else{
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
42 pragma(msg, "DSTRESS{XFAIL}: no inline ASM support");
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
43 static assert(0);
a3d6bbc8dec0 inline ASM review
thomask
parents:
diff changeset
44 }