view dmd/ShrExp.d @ 115:6caaf0256da1

+ interpretation of (non-assign) binary expressions + BinExp.isunsigned + EqualExp.isBit
author Trass3r
date Thu, 02 Sep 2010 01:29:29 +0200
parents e28b18c23469
children 60bb0fe4563e
line wrap: on
line source

module dmd.ShrExp;

import dmd.common;
import dmd.Expression;
import dmd.Identifier;
import dmd.InterState;
import dmd.Loc;
import dmd.Scope;
import dmd.IntRange;
import dmd.IRState;
import dmd.BinExp;
import dmd.TOK;
import dmd.Type;
import dmd.Id;

import dmd.backend.elem;
import dmd.backend.OPER;

import dmd.expression.shift_optimize;
import dmd.expression.Shr;

class ShrExp : BinExp
{
	this(Loc loc, Expression e1, Expression e2)
	{
		super(loc, TOK.TOKshr, ShrExp.sizeof, e1, e2);
	}

	override Expression semantic(Scope sc)
	{
		Expression e;

		if (!type)
		{	
			BinExp.semanticp(sc);
			e = op_overload(sc);
			
			if (e)
				return e;

			e1 = e1.checkIntegral();
			e2 = e2.checkIntegral();
			e1 = e1.integralPromotions(sc);
			e2 = e2.castTo(sc, Type.tshiftcnt);
			type = e1.type;
		}
		return this;
	}

	override Expression optimize(int result)
	{
		//printf("ShrExp::optimize(result = %d) %s\n", result, toChars());
		return shift_optimize(result, this, &Shr);
	}

	override Expression interpret(InterState istate)
	{
		return interpretCommon(istate, &Shr);
	}

	override IntRange getIntRange()
	{
		assert(false);
	}

	override Identifier opId()
	{
		return Id.shr;
	}

	override Identifier opId_r()
	{
		return Id.shr_r;
	}

	override elem* toElem(IRState* irs)
	{
		return toElemBin(irs, OPER.OPshr);
	}
}